首页> 外文OA文献 >The analysis and modeling of fine pitch laminate interconnect in response to large energy fault transients
【2h】

The analysis and modeling of fine pitch laminate interconnect in response to large energy fault transients

机译:细间距层压板互连在大能量故障瞬态响应中的分析和建模

代理获取
本网站仅为用户提供外文OA文献查询和代理获取服务,本网站没有原文。下单后我们将采用程序或人工为您竭诚获取高质量的原文,但由于OA文献来源多样且变更频繁,仍可能出现获取不到、文献不完整或与标题不符等情况,如果获取不到我们将提供退款服务。请知悉。

摘要

In embedded applications, the miniaturization of circuitry and functionality provides many benefits to both the producer and consumer. However, the benefits gained from miniaturization is not without penalty, as the environmental influences may be great enough to introduce system failures in new or different modes and effects;Of particular interest within this research is the effect of fault transients in reduced geometries of printed circuit card interconnect, commonly referred to as fine pitch laminate interconnect. Whereas larger geometries of conductor trace width and spacing may have been immune to circuit failure at a given fault input, the reduction of the trace geometry may introduce failures as the insulating effect of the dielectric is compromised to the point where arcing occurs;To address this concern, a circuit card was designed with fine pitch laminate features in microstrip, embedded microstrip, and stripline constructions. Various trace widths and separations were tested for structural integrity (presence of arcing or fusing) at voltage extremes defined in avionics standard. The specific trace widths in the test were 4 mils, 6 mils, 8 mils, and 12 mils, with the trace separation in each case equal to the trace widths. The results of the tests and methods to artificially improve the integrity of the interconnect are documented, providing a clear region of reliable operation to the designers and the engineering community;Finally, the construction of the interconnect and the results from the test were combined to create an empirical model for circuit analysis. Created for the Saber simulator, but readily adaptable to Spice, this model will describe high-speed operation of a propagating signal before breakdown, and uses data from the experiment to calculate threshold values for the arcing breakdown. The values for the breakdown voltages are correlated to the experimental data using statistical methods of weighted linear regression and hypothesis testing.
机译:在嵌入式应用中,电路和功能的小型化为生产者和消费者都带来了许多好处。然而,由于环境影响可能足以引入新的或不同的模式和影响的系统故障,因此从小型化中获得的好处也不是没有代价的;该研究特别感兴趣的是故障瞬态在减小印刷电路板几何尺寸中的影响卡互连,通常称为细间距层压互连。在给定的故障输入下,较大尺寸的导体走线宽度和间距可能会受到电路故障的影响,而走线几何形状的减小可能会引入故障,因为电介质的绝缘作用会降低到发生电弧的程度;值得关注的是,设计了一种在微带,嵌入式微带和带状线结构中具有细间距层压板特征的电路卡。在航空电子标准规定的极限电压下,测试了各种走线宽度和间距的结构完整性(是否存在电弧或熔断)。测试中的特定走线宽度为4 mils,6 mils,8 mils和12 mils,走线间隔分别等于走线宽度。记录了人为提高互连完整性的测试结果和方法的结果,为设计人员和工程界提供了可靠运行的明确区域;最后,将互连的结构和测试结果结合在一起以创建电路分析的经验模型。该模型是为Saber仿真器创建的,但很容易适应Spice,它将描述击穿前传播信号的高速运行,并使用实验数据计算电弧击穿的阈值。使用加权线性回归和假设检验的统计方法将击穿电压的值与实验数据相关。

著录项

  • 作者

    Jorgenson, Joel Arlen;

  • 作者单位
  • 年度 1998
  • 总页数
  • 原文格式 PDF
  • 正文语种 en
  • 中图分类

相似文献

  • 外文文献
  • 中文文献
  • 专利
代理获取

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号